ADZS-BF533-EZLITE【PDF 45/64 页】KIT W/BOARD EVAL FOR ADSP-BF533

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ADSP-BF531 / ADSP-BF532 / ADSP-BF533

TEST CONDITIONS

All timing parameters appearing in this data sheet were mea-

sured under the conditions described in this section. Figure 45

shows the measurement point for ac measurements (except out-

put enable/disable). The measurement point V MEAS is 0.95 V for

V DDEXT (nominal) = 1.8 V or 1.5 V for V DDEXT (nominal) = 2.5 V/

The time t DECAY is calculated with test loads C L and I L , and with

? V equal to 0.1 V for V DDEXT (nominal) = 1.8 V or 0.5 V for

V DDEXT (nominal) = 2.5 V/3.3 V.

The time t DIS_MEASURED is the interval from when the reference

signal switches, to when the output voltage decays ? V from the

measured output high or output low voltage.

3.3 V.

REFERENCE

SIGNAL

INPUT

OR

OUTPUT

V MEAS

V MEAS

t DIS_MEASURED

t ENA_MEASURED

t DIS

t ENA

Figure 45. Voltage Reference Levels for AC

Measurements (Except Output Enable/Disable)

Output Enable Time Measurement

V OH

(MEASURED)

V OL

(MEASURED)

V OH (MEASURED)

V OL (MEASURED) +

t DECAY

V

V

V OH (MEASURED)

V TRIP (HIGH)

V TRIP (LOW)

V OL (MEASURED)

t TRIP

Output pins are considered to be enabled when they have made

a transition from a high impedance state to the point when they

start driving.

OUTPUT STOPS DRIVING

OUTPUT STARTS DRIVING

The output enable time t ENA is the interval from the point when

a reference signal reaches a high or low voltage level to the point

when the output starts driving as shown on the right side of

The time t ENA_MEASURED is the interval, from when the reference

signal switches, to when the output voltage reaches V TRIP (high)

or V TRIP (low).

For V DDEXT (nominal) = 1.8 V—V TRIP (high) is 1.3 V and V TRIP

(low) is 0.7 V.

For V DDEXT (nominal) = 2.5 V/3.3 V—V TRIP (high) is 2.0 V and

V TRIP (low) is 1.0 V.

Time t TRIP is the interval from when the output starts driving to

when the output reaches the V TRIP (high) or V TRIP (low) trip

voltage.

Time t ENA is calculated as shown in the equation:

t ENA = t ENA_MEASURED – t TRIP

If multiple pins (such as the data bus) are enabled, the measure-

ment value is that of the first pin to start driving.

Output Disable Time Measurement

Output pins are considered to be disabled when they stop driv-

ing, go into a high impedance state, and start to decay from their

output high or low voltage. The output disable time t DIS is the

difference between t DIS_MEASURED and t DECAY as shown on the left

side of Figure 45 .

t DIS = t DIS_MEASURED – t DECAY

The time for the voltage on the bus to decay by ? V is dependent

on the capacitive load C L and the load current I I . This decay time

can be approximated by the equation:

t DECAY = ? C L ? V ? ? I L

HIGH IMPEDANCE STATE

Figure 46. Output Enable/Disable

Example System Hold Time Calculation

To determine the data output hold time in a particular system,

first calculate t DECAY using the equation given above. Choose ? V

to be the difference between the processor’s output voltage and

the input threshold for the device requiring the hold time. C L is

the total bus capacitance (per data line), and I L is the total leak-

age or three-state current (per data line). The hold time is t DECAY

plus the various output disable times as specified in the Timing

Specifications on Page 27 (for example t DSDAT for an SDRAM

write cycle as shown in SDRAM Interface Timing on Page 30 ).

Rev. I

|

Page 45 of 64 |

August 2013

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